module ShiftAddMul(
  input         clock,
  input         reset,
  input         in_load,
  input  [7:0]  in_A,
  input  [7:0]  in_B,
  output [15:0] out_P,
  output [15:0] out_M,
  output [7:0]  out_c
);
  reg  move_0; // @[ShiftAddMul.scala 25:21]
  reg  move_1; // @[ShiftAddMul.scala 25:21]
  reg  move_2; // @[ShiftAddMul.scala 25:21]
  reg  move_3; // @[ShiftAddMul.scala 25:21]
  reg  move_4; // @[ShiftAddMul.scala 25:21]
  reg  move_5; // @[ShiftAddMul.scala 25:21]
  reg  move_6; // @[ShiftAddMul.scala 25:21]
  reg  move_7; // @[ShiftAddMul.scala 25:21]
  reg  move_8; // @[ShiftAddMul.scala 25:21]
  reg  move_9; // @[ShiftAddMul.scala 25:21]
  reg  move_10; // @[ShiftAddMul.scala 25:21]
  reg  move_11; // @[ShiftAddMul.scala 25:21]
  reg  move_12; // @[ShiftAddMul.scala 25:21]
  reg  move_13; // @[ShiftAddMul.scala 25:21]
  reg  move_14; // @[ShiftAddMul.scala 25:21]
  reg  move_15; // @[ShiftAddMul.scala 25:21]
  reg  prod_0; // @[ShiftAddMul.scala 26:21]
  reg  prod_1; // @[ShiftAddMul.scala 26:21]
  reg  prod_2; // @[ShiftAddMul.scala 26:21]
  reg  prod_3; // @[ShiftAddMul.scala 26:21]
  reg  prod_4; // @[ShiftAddMul.scala 26:21]
  reg  prod_5; // @[ShiftAddMul.scala 26:21]
  reg  prod_6; // @[ShiftAddMul.scala 26:21]
  reg  prod_7; // @[ShiftAddMul.scala 26:21]
  reg  prod_8; // @[ShiftAddMul.scala 26:21]
  reg  prod_9; // @[ShiftAddMul.scala 26:21]
  reg  prod_10; // @[ShiftAddMul.scala 26:21]
  reg  prod_11; // @[ShiftAddMul.scala 26:21]
  reg  prod_12; // @[ShiftAddMul.scala 26:21]
  reg  prod_13; // @[ShiftAddMul.scala 26:21]
  reg  prod_14; // @[ShiftAddMul.scala 26:21]
  reg  prod_15; // @[ShiftAddMul.scala 26:21]
  reg [7:0] count; // @[ShiftAddMul.scala 29:22]
  wire [7:0] _T_1 = in_A >> count; // @[ShiftAddMul.scala 41:14]
  wire  _GEN_1 = _T_1[0] & (prod_0 & move_0); // @[ShiftAddMul.scala 41:30 48:12 32:14]
  wire  _GEN_33 = count < 8'h10 & _GEN_1; // @[ShiftAddMul.scala 32:14 39:35]
  wire  carry_1 = in_load ? 1'h0 : _GEN_33; // @[ShiftAddMul.scala 32:14 35:17]
  wire  _GEN_3 = _T_1[0] & (prod_1 & move_1 | move_1 & carry_1 | carry_1 & prod_1); // @[ShiftAddMul.scala 41:30 48:12 32:14]
  wire  _GEN_35 = count < 8'h10 & _GEN_3; // @[ShiftAddMul.scala 32:14 39:35]
  wire  carry_2 = in_load ? 1'h0 : _GEN_35; // @[ShiftAddMul.scala 32:14 35:17]
  wire  _GEN_5 = _T_1[0] & (prod_2 & move_2 | move_2 & carry_2 | carry_2 & prod_2); // @[ShiftAddMul.scala 41:30 48:12 32:14]
  wire  _GEN_37 = count < 8'h10 & _GEN_5; // @[ShiftAddMul.scala 32:14 39:35]
  wire  carry_3 = in_load ? 1'h0 : _GEN_37; // @[ShiftAddMul.scala 32:14 35:17]
  wire  _GEN_7 = _T_1[0] & (prod_3 & move_3 | move_3 & carry_3 | carry_3 & prod_3); // @[ShiftAddMul.scala 41:30 48:12 32:14]
  wire  _GEN_39 = count < 8'h10 & _GEN_7; // @[ShiftAddMul.scala 32:14 39:35]
  wire  carry_4 = in_load ? 1'h0 : _GEN_39; // @[ShiftAddMul.scala 32:14 35:17]
  wire  _GEN_9 = _T_1[0] & (prod_4 & move_4 | move_4 & carry_4 | carry_4 & prod_4); // @[ShiftAddMul.scala 41:30 48:12 32:14]
  wire  _GEN_41 = count < 8'h10 & _GEN_9; // @[ShiftAddMul.scala 32:14 39:35]
  wire  carry_5 = in_load ? 1'h0 : _GEN_41; // @[ShiftAddMul.scala 32:14 35:17]
  wire  _GEN_11 = _T_1[0] & (prod_5 & move_5 | move_5 & carry_5 | carry_5 & prod_5); // @[ShiftAddMul.scala 41:30 48:12 32:14]
  wire  _GEN_43 = count < 8'h10 & _GEN_11; // @[ShiftAddMul.scala 32:14 39:35]
  wire  carry_6 = in_load ? 1'h0 : _GEN_43; // @[ShiftAddMul.scala 32:14 35:17]
  wire  _GEN_13 = _T_1[0] & (prod_6 & move_6 | move_6 & carry_6 | carry_6 & prod_6); // @[ShiftAddMul.scala 41:30 48:12 32:14]
  wire  _GEN_45 = count < 8'h10 & _GEN_13; // @[ShiftAddMul.scala 32:14 39:35]
  wire  carry_7 = in_load ? 1'h0 : _GEN_45; // @[ShiftAddMul.scala 32:14 35:17]
  wire  _GEN_15 = _T_1[0] & (prod_7 & move_7 | move_7 & carry_7 | carry_7 & prod_7); // @[ShiftAddMul.scala 41:30 48:12 32:14]
  wire  _GEN_47 = count < 8'h10 & _GEN_15; // @[ShiftAddMul.scala 32:14 39:35]
  wire  carry_8 = in_load ? 1'h0 : _GEN_47; // @[ShiftAddMul.scala 32:14 35:17]
  wire  _GEN_17 = _T_1[0] & (prod_8 & move_8 | move_8 & carry_8 | carry_8 & prod_8); // @[ShiftAddMul.scala 41:30 48:12 32:14]
  wire  _GEN_49 = count < 8'h10 & _GEN_17; // @[ShiftAddMul.scala 32:14 39:35]
  wire  carry_9 = in_load ? 1'h0 : _GEN_49; // @[ShiftAddMul.scala 32:14 35:17]
  wire  _GEN_19 = _T_1[0] & (prod_9 & move_9 | move_9 & carry_9 | carry_9 & prod_9); // @[ShiftAddMul.scala 41:30 48:12 32:14]
  wire  _GEN_51 = count < 8'h10 & _GEN_19; // @[ShiftAddMul.scala 32:14 39:35]
  wire  carry_10 = in_load ? 1'h0 : _GEN_51; // @[ShiftAddMul.scala 32:14 35:17]
  wire  _GEN_21 = _T_1[0] & (prod_10 & move_10 | move_10 & carry_10 | carry_10 & prod_10); // @[ShiftAddMul.scala 41:30 48:12 32:14]
  wire  _GEN_53 = count < 8'h10 & _GEN_21; // @[ShiftAddMul.scala 32:14 39:35]
  wire  carry_11 = in_load ? 1'h0 : _GEN_53; // @[ShiftAddMul.scala 32:14 35:17]
  wire  _GEN_23 = _T_1[0] & (prod_11 & move_11 | move_11 & carry_11 | carry_11 & prod_11); // @[ShiftAddMul.scala 41:30 48:12 32:14]
  wire  _GEN_55 = count < 8'h10 & _GEN_23; // @[ShiftAddMul.scala 32:14 39:35]
  wire  carry_12 = in_load ? 1'h0 : _GEN_55; // @[ShiftAddMul.scala 32:14 35:17]
  wire  _GEN_25 = _T_1[0] & (prod_12 & move_12 | move_12 & carry_12 | carry_12 & prod_12); // @[ShiftAddMul.scala 41:30 48:12 32:14]
  wire  _GEN_57 = count < 8'h10 & _GEN_25; // @[ShiftAddMul.scala 32:14 39:35]
  wire  carry_13 = in_load ? 1'h0 : _GEN_57; // @[ShiftAddMul.scala 32:14 35:17]
  wire  _GEN_27 = _T_1[0] & (prod_13 & move_13 | move_13 & carry_13 | carry_13 & prod_13); // @[ShiftAddMul.scala 41:30 48:12 32:14]
  wire  _GEN_59 = count < 8'h10 & _GEN_27; // @[ShiftAddMul.scala 32:14 39:35]
  wire  carry_14 = in_load ? 1'h0 : _GEN_59; // @[ShiftAddMul.scala 32:14 35:17]
  wire  _GEN_29 = _T_1[0] & (prod_14 & move_14 | move_14 & carry_14 | carry_14 & prod_14); // @[ShiftAddMul.scala 41:30 48:12 32:14]
  wire  _GEN_61 = count < 8'h10 & _GEN_29; // @[ShiftAddMul.scala 32:14 39:35]
  wire  carry_15 = in_load ? 1'h0 : _GEN_61; // @[ShiftAddMul.scala 32:14 35:17]
  wire  _GEN_0 = _T_1[0] ? prod_0 ^ move_0 : prod_0; // @[ShiftAddMul.scala 41:30 47:11 51:12]
  wire  _GEN_2 = _T_1[0] ? prod_1 ^ move_1 ^ carry_1 : prod_1; // @[ShiftAddMul.scala 41:30 47:11 51:12]
  wire  _GEN_4 = _T_1[0] ? prod_2 ^ move_2 ^ carry_2 : prod_2; // @[ShiftAddMul.scala 41:30 47:11 51:12]
  wire  _GEN_6 = _T_1[0] ? prod_3 ^ move_3 ^ carry_3 : prod_3; // @[ShiftAddMul.scala 41:30 47:11 51:12]
  wire  _GEN_8 = _T_1[0] ? prod_4 ^ move_4 ^ carry_4 : prod_4; // @[ShiftAddMul.scala 41:30 47:11 51:12]
  wire  _GEN_10 = _T_1[0] ? prod_5 ^ move_5 ^ carry_5 : prod_5; // @[ShiftAddMul.scala 41:30 47:11 51:12]
  wire  _GEN_12 = _T_1[0] ? prod_6 ^ move_6 ^ carry_6 : prod_6; // @[ShiftAddMul.scala 41:30 47:11 51:12]
  wire  _GEN_14 = _T_1[0] ? prod_7 ^ move_7 ^ carry_7 : prod_7; // @[ShiftAddMul.scala 41:30 47:11 51:12]
  wire  _GEN_16 = _T_1[0] ? prod_8 ^ move_8 ^ carry_8 : prod_8; // @[ShiftAddMul.scala 41:30 47:11 51:12]
  wire  _GEN_18 = _T_1[0] ? prod_9 ^ move_9 ^ carry_9 : prod_9; // @[ShiftAddMul.scala 41:30 47:11 51:12]
  wire  _GEN_20 = _T_1[0] ? prod_10 ^ move_10 ^ carry_10 : prod_10; // @[ShiftAddMul.scala 41:30 47:11 51:12]
  wire  _GEN_22 = _T_1[0] ? prod_11 ^ move_11 ^ carry_11 : prod_11; // @[ShiftAddMul.scala 41:30 47:11 51:12]
  wire  _GEN_24 = _T_1[0] ? prod_12 ^ move_12 ^ carry_12 : prod_12; // @[ShiftAddMul.scala 41:30 47:11 51:12]
  wire  _GEN_26 = _T_1[0] ? prod_13 ^ move_13 ^ carry_13 : prod_13; // @[ShiftAddMul.scala 41:30 47:11 51:12]
  wire  _GEN_28 = _T_1[0] ? prod_14 ^ move_14 ^ carry_14 : prod_14; // @[ShiftAddMul.scala 41:30 47:11 51:12]
  wire  _GEN_30 = _T_1[0] ? prod_15 ^ move_15 ^ carry_15 : prod_15; // @[ShiftAddMul.scala 41:30 47:11 51:12]
  wire [7:0] _count_T_1 = count + 8'h1; // @[ShiftAddMul.scala 59:20]
  wire  _GEN_32 = count < 8'h10 & _GEN_0; // @[ShiftAddMul.scala 26:21 39:35]
  wire  _GEN_34 = count < 8'h10 & _GEN_2; // @[ShiftAddMul.scala 26:21 39:35]
  wire  _GEN_36 = count < 8'h10 & _GEN_4; // @[ShiftAddMul.scala 26:21 39:35]
  wire  _GEN_38 = count < 8'h10 & _GEN_6; // @[ShiftAddMul.scala 26:21 39:35]
  wire  _GEN_40 = count < 8'h10 & _GEN_8; // @[ShiftAddMul.scala 26:21 39:35]
  wire  _GEN_42 = count < 8'h10 & _GEN_10; // @[ShiftAddMul.scala 26:21 39:35]
  wire  _GEN_44 = count < 8'h10 & _GEN_12; // @[ShiftAddMul.scala 26:21 39:35]
  wire  _GEN_46 = count < 8'h10 & _GEN_14; // @[ShiftAddMul.scala 26:21 39:35]
  wire  _GEN_48 = count < 8'h10 & _GEN_16; // @[ShiftAddMul.scala 26:21 39:35]
  wire  _GEN_50 = count < 8'h10 & _GEN_18; // @[ShiftAddMul.scala 26:21 39:35]
  wire  _GEN_52 = count < 8'h10 & _GEN_20; // @[ShiftAddMul.scala 26:21 39:35]
  wire  _GEN_54 = count < 8'h10 & _GEN_22; // @[ShiftAddMul.scala 26:21 39:35]
  wire  _GEN_56 = count < 8'h10 & _GEN_24; // @[ShiftAddMul.scala 26:21 39:35]
  wire  _GEN_58 = count < 8'h10 & _GEN_26; // @[ShiftAddMul.scala 26:21 39:35]
  wire  _GEN_60 = count < 8'h10 & _GEN_28; // @[ShiftAddMul.scala 26:21 39:35]
  wire  _GEN_62 = count < 8'h10 & _GEN_30; // @[ShiftAddMul.scala 26:21 39:35]
  wire  _GEN_64 = count < 8'h10 & move_0; // @[ShiftAddMul.scala 39:35 56:17 25:21]
  wire  _GEN_65 = count < 8'h10 & move_1; // @[ShiftAddMul.scala 39:35 56:17 25:21]
  wire  _GEN_66 = count < 8'h10 & move_2; // @[ShiftAddMul.scala 39:35 56:17 25:21]
  wire  _GEN_67 = count < 8'h10 & move_3; // @[ShiftAddMul.scala 39:35 56:17 25:21]
  wire  _GEN_68 = count < 8'h10 & move_4; // @[ShiftAddMul.scala 39:35 56:17 25:21]
  wire  _GEN_69 = count < 8'h10 & move_5; // @[ShiftAddMul.scala 39:35 56:17 25:21]
  wire  _GEN_70 = count < 8'h10 & move_6; // @[ShiftAddMul.scala 39:35 56:17 25:21]
  wire  _GEN_71 = count < 8'h10 & move_7; // @[ShiftAddMul.scala 39:35 56:17 25:21]
  wire  _GEN_72 = count < 8'h10 & move_8; // @[ShiftAddMul.scala 39:35 56:17 25:21]
  wire  _GEN_73 = count < 8'h10 & move_9; // @[ShiftAddMul.scala 39:35 56:17 25:21]
  wire  _GEN_74 = count < 8'h10 & move_10; // @[ShiftAddMul.scala 39:35 56:17 25:21]
  wire  _GEN_75 = count < 8'h10 & move_11; // @[ShiftAddMul.scala 39:35 56:17 25:21]
  wire  _GEN_76 = count < 8'h10 & move_12; // @[ShiftAddMul.scala 39:35 56:17 25:21]
  wire  _GEN_77 = count < 8'h10 & move_13; // @[ShiftAddMul.scala 39:35 56:17 25:21]
  wire  _GEN_78 = count < 8'h10 & move_14; // @[ShiftAddMul.scala 39:35 56:17 25:21]
  wire [7:0] out_M_lo = {move_7,move_6,move_5,move_4,move_3,move_2,move_1,move_0}; // @[ShiftAddMul.scala 62:17]
  wire [7:0] out_M_hi = {move_15,move_14,move_13,move_12,move_11,move_10,move_9,move_8}; // @[ShiftAddMul.scala 62:17]
  wire [7:0] out_P_lo = {prod_7,prod_6,prod_5,prod_4,prod_3,prod_2,prod_1,prod_0}; // @[ShiftAddMul.scala 63:17]
  wire [7:0] out_P_hi = {prod_15,prod_14,prod_13,prod_12,prod_11,prod_10,prod_9,prod_8}; // @[ShiftAddMul.scala 63:17]
  assign out_P = {out_P_hi,out_P_lo}; // @[ShiftAddMul.scala 63:17]
  assign out_M = {out_M_hi,out_M_lo}; // @[ShiftAddMul.scala 62:17]
  assign out_c = count; // @[ShiftAddMul.scala 64:9]
  always @(posedge clock) begin
    move_0 <= in_load & in_B[0]; // @[ShiftAddMul.scala 35:17 37:15 25:21]
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      move_1 <= in_B[1]; // @[ShiftAddMul.scala 37:15]
    end else begin
      move_1 <= _GEN_64;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      move_2 <= in_B[2]; // @[ShiftAddMul.scala 37:15]
    end else begin
      move_2 <= _GEN_65;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      move_3 <= in_B[3]; // @[ShiftAddMul.scala 37:15]
    end else begin
      move_3 <= _GEN_66;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      move_4 <= in_B[4]; // @[ShiftAddMul.scala 37:15]
    end else begin
      move_4 <= _GEN_67;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      move_5 <= in_B[5]; // @[ShiftAddMul.scala 37:15]
    end else begin
      move_5 <= _GEN_68;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      move_6 <= in_B[6]; // @[ShiftAddMul.scala 37:15]
    end else begin
      move_6 <= _GEN_69;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      move_7 <= in_B[7]; // @[ShiftAddMul.scala 37:15]
    end else begin
      move_7 <= _GEN_70;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      move_8 <= 1'h0; // @[ShiftAddMul.scala 25:21]
    end else begin
      move_8 <= _GEN_71;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      move_9 <= 1'h0; // @[ShiftAddMul.scala 25:21]
    end else begin
      move_9 <= _GEN_72;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      move_10 <= 1'h0; // @[ShiftAddMul.scala 25:21]
    end else begin
      move_10 <= _GEN_73;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      move_11 <= 1'h0; // @[ShiftAddMul.scala 25:21]
    end else begin
      move_11 <= _GEN_74;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      move_12 <= 1'h0; // @[ShiftAddMul.scala 25:21]
    end else begin
      move_12 <= _GEN_75;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      move_13 <= 1'h0; // @[ShiftAddMul.scala 25:21]
    end else begin
      move_13 <= _GEN_76;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      move_14 <= 1'h0; // @[ShiftAddMul.scala 25:21]
    end else begin
      move_14 <= _GEN_77;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      move_15 <= 1'h0; // @[ShiftAddMul.scala 25:21]
    end else begin
      move_15 <= _GEN_78;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      prod_0 <= 1'h0; // @[ShiftAddMul.scala 26:21]
    end else begin
      prod_0 <= _GEN_32;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      prod_1 <= 1'h0; // @[ShiftAddMul.scala 26:21]
    end else begin
      prod_1 <= _GEN_34;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      prod_2 <= 1'h0; // @[ShiftAddMul.scala 26:21]
    end else begin
      prod_2 <= _GEN_36;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      prod_3 <= 1'h0; // @[ShiftAddMul.scala 26:21]
    end else begin
      prod_3 <= _GEN_38;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      prod_4 <= 1'h0; // @[ShiftAddMul.scala 26:21]
    end else begin
      prod_4 <= _GEN_40;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      prod_5 <= 1'h0; // @[ShiftAddMul.scala 26:21]
    end else begin
      prod_5 <= _GEN_42;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      prod_6 <= 1'h0; // @[ShiftAddMul.scala 26:21]
    end else begin
      prod_6 <= _GEN_44;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      prod_7 <= 1'h0; // @[ShiftAddMul.scala 26:21]
    end else begin
      prod_7 <= _GEN_46;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      prod_8 <= 1'h0; // @[ShiftAddMul.scala 26:21]
    end else begin
      prod_8 <= _GEN_48;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      prod_9 <= 1'h0; // @[ShiftAddMul.scala 26:21]
    end else begin
      prod_9 <= _GEN_50;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      prod_10 <= 1'h0; // @[ShiftAddMul.scala 26:21]
    end else begin
      prod_10 <= _GEN_52;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      prod_11 <= 1'h0; // @[ShiftAddMul.scala 26:21]
    end else begin
      prod_11 <= _GEN_54;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      prod_12 <= 1'h0; // @[ShiftAddMul.scala 26:21]
    end else begin
      prod_12 <= _GEN_56;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      prod_13 <= 1'h0; // @[ShiftAddMul.scala 26:21]
    end else begin
      prod_13 <= _GEN_58;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      prod_14 <= 1'h0; // @[ShiftAddMul.scala 26:21]
    end else begin
      prod_14 <= _GEN_60;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      prod_15 <= 1'h0; // @[ShiftAddMul.scala 26:21]
    end else begin
      prod_15 <= _GEN_62;
    end
    if (in_load) begin // @[ShiftAddMul.scala 35:17]
      count <= 8'h0; // @[ShiftAddMul.scala 29:22]
    end else if (count < 8'h10) begin // @[ShiftAddMul.scala 39:35]
      count <= _count_T_1; // @[ShiftAddMul.scala 59:11]
    end else begin
      count <= 8'h0; // @[ShiftAddMul.scala 29:22]
    end
  end
endmodule
